List of teams selected to advance to the final round of the IIRC-06-07
Research Id	Project Name	Institute Name	Students
IIRC-012	SIGMA DELTA CONVERTERS FOR UWB CIRCUITS	CMR Institute of Technology, Bangalore	Praneel Misale,Prabesh Aryal,Aravind R,Srikantha B
IIRC-026	MODELING OF LEAKAGES IN NANO-SCALE DOUBLE GATE MOSFET TO IMPLEMENT	Indian Institute of Technology, Roorkee	Abhishek Paliwal, Venkat Komal Kumar
IIRC-034	A decision support system for disease surveillance in rural india	National Institute of Technology, Rourkela	Abhijit ghosh,Padhi Supreet,Priyadarshee Dash Sumeet,Amartya Singh
IIRC-037	CIRCUIT TECHNIQUES FOR DESIGN OF HIGH FREQUENCY, LOW POWER, LOW VOLTAGE PHASE LOCKED LOOP (PLL) IN C	Motilal Nehru National Institute of Technology Allahabad	Sunny Arora, Anubhav Srivastava,Ankesh Jain
IIRC-040	Process Variation Aware Adaptive Cache Architecture	International Institute of Information Technology, Hyderabad	Sambhav Jain,Pavan Kumar S
IIRC-042	Water Supply Surveillance System (WSSS)	Netaji Subhas Institute Of Technology	Abhishek Agarwal,Ankur Kain, Rahul Gupta
IIRC-080	Reduced Computation Memory Access Efficient FPGA Implementation of Motion Estimation using Enhanced	Madras Institute of Technology, Anna University	Lavanya Subramanian,Gayatri Singaravelu,Arunachalam Annamalai
IIRC-090	Novel High-Speed Architecture for 32-bit ALU using Hybrid Logic Style	International Institute of Information Technology, Hyderabad	Sreehari Veeramachaneni,Krithi Krishna Muntimadugu,Avinash Lingamneni,Sreekanth Puppala,Pradeep Yarlagadda
IIRC-092	Real Time Braille Recognition with Sonic Feedback for Pocket PC	College Of engineering, Guindy, Anna University	Charanya Chandrasekaran,Kalpana Sundar,Nithya Ramanathan
IIRC-103	Design of Low voltage,High gain, Wide bandwidth Current Feedback Amplifier with rail torail Capabili	DA-IICT,Gandhinagar	Divya Dubey, Rachit Mohan
IIRC-105	Design of a Low Power Analog VLSI Chip to emulate directional and orientation selectivity within <5%	Indian Institute of Technology, Delhi	Pawan Gilhotra,Gaurava Srivastava
IIRC-109	FPGA implementation of Low Power High Throughput Scalable architectures for LDPC Decoders using Adap	Madras Institute of Technology, Anna University	Kaushik,Anusha Radhakrishnan,Valli Sounthariya A
IIRC-111	Power Efficient Cooperative Cache Coherence for Chip Multiprocessors	Birla Institute of Technology and Science,Pilani	Amit Roy,Supriya Vadlamani
IIRC-115	DESIGN SPACE EXPLORATION AND OPTIMIZATION OF CMOS PHASE LOCKED LOOPS	College Of engineering, Guindy, Anna University	Rajesh Kumar A,Ramakrishnan R S,Praveen Babu Vadivelu,Shankar P